Architectural and compiler support for strongly atomic transactional memory

Transactions are gaining ground as a programmer-friendly means of expressing concurrency, as microarchitecture trends make it clear that parallel systems are in our future. This thesis presents the design and implementation of four e cient and powerful transaction systems: ApeX, an objectoriented software-only system; UTM and LTM, two scalable systems using custom processor extensions; and HyApeX, a hybrid of the software and hardware systems, obtaining the bene ts of both. The software transaction system implements strong atomicity, which ensures that transactions are protected from the in uence of nontransactional code. Previous software systems use weaker atomicity guarantees because strong atomicity is presumed to be too expensive. In this thesis strong atomicity is obtained with minimal slowdown for nontransactional code. Compiler analyses can further improve the e ciency of the mechanism, which has been formally veri ed with the Spin model-checker. The low overhead of ApeX allows it to be pro tably combined with a hardware transaction system to provide fast execution of short and small transactions, while allowing fallback to software for large or complicated transactions. I present UTM, a hardware transactional memory system allowing unbounded virtualizable transactions, and show how a hybrid system can be obtained. Thesis Supervisor: Martin Rinard Title: Professor of Computer Science and Engineering